<?xml version="1.0" encoding="UTF-8"?>
<!-- This sitemap was dynamically generated on September 11, 2026 at 8:51 pm by All in One SEO v5.0.1.1 - the original SEO plugin for WordPress. -->

<?xml-stylesheet type="text/xsl" href="https://learndigitallogic.com/default-sitemap.xsl"?>

<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom">
	<channel>
		<title>Learn Digital Logic</title>
		<link><![CDATA[https://learndigitallogic.com]]></link>
		<description><![CDATA[Learn Digital Logic]]></description>
		<lastBuildDate><![CDATA[Fri, 11 Sep 2026 05:36:25 +0000]]></lastBuildDate>
		<docs>https://validator.w3.org/feed/docs/rss2.html</docs>
		<atom:link href="https://learndigitallogic.com/sitemap.rss" rel="self" type="application/rss+xml" />
		<ttl><![CDATA[60]]></ttl>

		<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/state-output-equations-to-logic-diagram/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/state-output-equations-to-logic-diagram/]]></link>
			<title>How to Convert State and Output Equations to a Logic Diagram</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:36:25 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/state-table-to-equations/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/state-table-to-equations/]]></link>
			<title>How to Convert a State Transition Table to State and Output Equations</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:36:01 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/state-diagram-to-state-table/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/state-diagram-to-state-table/]]></link>
			<title>How to Convert a State Transition Diagram to State Transition Table</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:35:35 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-design/]]></link>
			<title>Design of Synchronous Sequential Logic Circuits</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:35:11 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/state-table-to-state-diagram/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/state-table-to-state-diagram/]]></link>
			<title>How to Convert a State Transition Table to State Transition Diagram</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:34:45 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/equations-to-state-table/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/equations-to-state-table/]]></link>
			<title>How to Convert State and Output Equations to State Table</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:34:21 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/logic-diagram-to-state-output-equations/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/logic-diagram-to-state-output-equations/]]></link>
			<title>How to Convert a Logic Diagram to State and Output Equations</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:33:55 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/synchronous-sequential-logic-circuits-analysis/]]></link>
			<title>Analysis of Synchronous Sequential Logic Circuits</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:33:28 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/latches-vs-flip-flops-timing-diagram-comparison/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/latches-vs-flip-flops-timing-diagram-comparison/]]></link>
			<title>Comparison of Timing Diagram between Latches and Flip-flops</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:32:57 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/jk-flipflop/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/jk-flipflop/]]></link>
			<title>A Complete Guide to JK Flip-flops</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:32:29 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/t-flipflop/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/t-flipflop/]]></link>
			<title>A Complete Guide to T Flip-flops</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:32:03 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/d-flipflop/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/d-flipflop/]]></link>
			<title>A Complete Guide to D Flip-flops</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:31:32 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/nand-d-latch/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/nand-d-latch/]]></link>
			<title>A Complete Guide to D Latch Implemented through NAND Gates</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:31:05 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/nand-sr-latch/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/nand-sr-latch/]]></link>
			<title>A Complete Guide to SR Latch Implemented through NAND Gates</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:30:38 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/]]></link>
			<title>A Complete Guide to Sequential Logic Circuits</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:29:57 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-16-2/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-16-2/]]></link>
			<title>How to Convert Hexadecimal Into Binary with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 13:02:11 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-full/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-full/]]></link>
			<title>A Complete Guide to a Full Adder: Definition, Design and Latency</title>
			<pubDate><![CDATA[Tue, 24 Feb 2026 07:58:57 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-8-2/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-8-2/]]></link>
			<title>How to Convert Octal Into Binary with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 13:01:27 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-2-16/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-2-16/]]></link>
			<title>How to Convert Binary Into Hexadecimal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 13:00:05 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-2-8/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/conv-2-8/]]></link>
			<title>How to Convert Binary Into Octal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:59:09 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-int-2/]]></link>
			<title>How to Inter-convert Number Systems in Powers of 2?</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:58:22 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/logic-gates/solve-gates/cct-latency/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/logic-gates/solve-gates/cct-latency/]]></link>
			<title>How to Solve Logic Diagram to Output Latency Problems?</title>
			<pubDate><![CDATA[Wed, 18 Feb 2026 03:53:26 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/privacy-policy/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/privacy-policy/]]></link>
			<title>Privacy Policy</title>
			<pubDate><![CDATA[Tue, 28 Oct 2025 09:49:01 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/state-diagram-minimization/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/sequential/state-diagram-minimization/]]></link>
			<title>How to Minimize or Optimize a State Diagram</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 05:36:50 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/conv-16-10/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/conv-16-10/]]></link>
			<title>How to Convert Hexadecimal Into Decimal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:57:35 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/conv-8-10/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/conv-8-10/]]></link>
			<title>How to Convert Octal Into Decimal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:56:39 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-half/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-half/]]></link>
			<title>A Complete Guide to a Half Adder: Definition, Design and Latency</title>
			<pubDate><![CDATA[Tue, 24 Feb 2026 06:20:28 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/]]></link>
			<title>How to Convert Decimal Into Other Systems with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:54:39 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/conv-10-16/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/conv-10-16/]]></link>
			<title>How to Convert Decimal Into Hexadecimal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:53:46 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/conv-10-8/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/conv-10-8/]]></link>
			<title>How to Convert Decimal Into Octal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:52:18 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/conv-10-2/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-10-others/conv-10-2/]]></link>
			<title>How to Convert Decimal Into Binary with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:48:34 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/mux/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/mux/]]></link>
			<title>A Complete Guide to Multiplexers: MUX Logic &amp; Design</title>
			<pubDate><![CDATA[Sun, 08 Mar 2026 06:49:50 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/timing-diagram/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/timing-diagram/]]></link>
			<title>A Complete Guide to Timing Diagrams: Signals &amp; Problem Solving</title>
			<pubDate><![CDATA[Sun, 08 Mar 2026 06:37:19 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-cla/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-cla/]]></link>
			<title>A Complete Guide to Carry Lookahead Adder: Definition, Design and Latency</title>
			<pubDate><![CDATA[Sat, 28 Feb 2026 09:10:21 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/func-simplification/boolean/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/func-simplification/boolean/]]></link>
			<title>How to Simplify a Logic Function Using Boolean Algebra?</title>
			<pubDate><![CDATA[Tue, 28 Oct 2025 09:41:55 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/conv-2-10/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/conv-2-10/]]></link>
			<title>How to Convert Binary Into Decimal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:56:00 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/func-representation/maxterms/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/func-representation/maxterms/]]></link>
			<title>How to Represent a Logical Output Through Maxterms?</title>
			<pubDate><![CDATA[Tue, 17 Feb 2026 08:57:37 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/func-representation/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/func-representation/]]></link>
			<title>How to Represent a Logical Output Function?</title>
			<pubDate><![CDATA[Tue, 17 Feb 2026 06:32:53 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-ripple/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/adder-ripple/]]></link>
			<title>A Complete Guide to Ripple Carry Adder: Definition, Design and Latency</title>
			<pubDate><![CDATA[Thu, 09 Oct 2025 08:18:52 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/signed-subtraction/signed-addition-subtraction-2s-complement/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/signed-subtraction/signed-addition-subtraction-2s-complement/]]></link>
			<title>How to Do Signed Binary Addition/Subtraction in 2&#039;s Complement Form</title>
			<pubDate><![CDATA[Sun, 15 Feb 2026 06:16:00 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/signed-subtraction/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/signed-subtraction/]]></link>
			<title>How to Subtract Signed Numbers: Subtraction as Addition with Complements</title>
			<pubDate><![CDATA[Sun, 15 Feb 2026 05:41:52 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/subtraction-as-addition/unsigned-subtraction-r-1s-complement/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/subtraction-as-addition/unsigned-subtraction-r-1s-complement/]]></link>
			<title>How to Subtract Unsigned Numbers Using (r-1)&#039;s Complement</title>
			<pubDate><![CDATA[Sun, 15 Feb 2026 05:10:09 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/number-complement-form/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/signed-unsigned-addition-subtraction/number-complement-form/]]></link>
			<title>Number Representation and Complements in Digital Systems</title>
			<pubDate><![CDATA[Fri, 13 Feb 2026 07:31:16 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/base-conv-chart/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/base-conv-chart/]]></link>
			<title>Base Conversion of the First 16 Values Across Key Systems</title>
			<pubDate><![CDATA[Fri, 13 Feb 2026 06:40:52 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/dmux/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/dmux/]]></link>
			<title>A Complete Guide to Demultiplexers: DMUX Logic &amp; Design</title>
			<pubDate><![CDATA[Thu, 09 Oct 2025 08:17:46 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/decoder/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/decoder/]]></link>
			<title>A Complete Guide to Decoders: Logic, Symbols &amp; Cascading</title>
			<pubDate><![CDATA[Thu, 09 Oct 2025 08:17:32 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/number-systems/conv-numbers/conv-others-10/]]></link>
			<title>How to Convert Other Systems Into Decimal with Precision</title>
			<pubDate><![CDATA[Sun, 30 Aug 2026 12:55:21 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/encoder/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/encoder/]]></link>
			<title>A Complete Guide to Encoders: Priority, Symbols &amp; Logic</title>
			<pubDate><![CDATA[Thu, 09 Oct 2025 08:17:22 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/combinational/adder/]]></link>
			<title>A Complete Guide to Binary Adders &amp; Their Design</title>
			<pubDate><![CDATA[Thu, 09 Oct 2025 08:17:14 +0000]]></pubDate>
		</item>
					<item>
			<guid><![CDATA[https://learndigitallogic.com/free-courses/dld/]]></guid>
			<link><![CDATA[https://learndigitallogic.com/free-courses/dld/]]></link>
			<title>Basics of Digital Logic Design</title>
			<pubDate><![CDATA[Fri, 11 Sep 2026 11:27:46 +0000]]></pubDate>
		</item>
				</channel>
</rss>
